SDR Front-End Reality: IQ Imbalance, DC Offset, and LO Leakage
March 14, 2026
Why ideal IQ models fail on real hardware
In textbooks, a direct-conversion receiver gives perfectly orthogonal I and Q channels with matched gain and exact 90-degree phase separation. In practice, analog mismatches and mixer feedthrough create deterministic distortion terms:
Gain mismatch between I and Q paths
Phase error from imperfect quadrature
DC offset at baseband
Local oscillator (LO) leakage and self-mixing
A compact way to model the received complex baseband sample is:r[n] = alpha * s[n] + beta * conj(s[n]) + d + w[n]where:
alpha is desired complex gain
beta captures image terms from IQ imbalance
d is DC offset
w[n] is noise/interference
The beta term creates mirror-frequency energy. In waterfall views this appears as a mirrored signal around DC.
Practical calibration loop
Estimate and remove DC using a slow IIR or block mean.
Estimate IQ mismatch from a known pilot or strong CW tone.
Solve least-squares for alpha and beta.
Apply widely-linear correction:
s_hat[n] = c1 * r[n] + c2 * conj(r[n])
Re-estimate periodically because temperature drift changes analog parameters.
Deployment notes
Keep calibration in fixed-point if running in FPGA fabric.
Prefer pilot-aided updates in bursty channels.
If AGC is active, freeze adaptation while gain changes.
The key insight: many SDR demod failures are not from synchronization logic first, but from uncorrected front-end imbalance corrupting constellation geometry before the DSP chain starts.