<?xml version="1.0" encoding="UTF-8"?>
<urlset xmlns="http://www.sitemaps.org/schemas/sitemap/0.9">
<url>
<loc>https://aminemahdane.com/</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/about</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/blog</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/gallery</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/utils</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/utils/filter-designer</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/utils/satellite-tracker</loc>
<lastmod>2026-04-03T21:38:44.824Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/blog/sdr-front-end-iq-imbalance-dc-offset-lo-leakage</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/blog/fpga-sdr-dsp-pipeline-adc-to-symbols</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/blog/cic-fir-decimation-fpga-alias-control</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/blog/ofdm-receiver-synchronization-sdr-cfo-timing</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/lcsc2kicad</loc>
<lastmod>2026-03-13T23:18:25.974Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/modular-robotics-electronics-architecture</loc>
<lastmod>2026-03-13T23:18:25.974Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/real-time-amateur-radio-satellite-tracker</loc>
<lastmod>2026-03-13T23:18:25.974Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/antenna-calculator</loc>
<lastmod>2026-03-13T23:18:25.974Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/open-sdr-lab-receiver-calibration-iq-correction</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/fpga-baseband-pipeline-for-sdr</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/cic-fir-decimation-design-explorer</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
<url>
<loc>https://aminemahdane.com/work/ofdm-sync-chain-prototype-for-sdr-fpga</loc>
<lastmod>2026-03-13T23:58:10.646Z</lastmod>
</url>
</urlset>
